The air gap flux and the rotor speed are detected by processing the signal obtained from the summation of the stator phase voltages, Vs3. The DSP performs the integration of the third harmonic voltage signal to derive the third harmonic flux. In order to detect the rotor speed the signal Vs3 is processed by a switched capacitor band-pass filter (SCF), whose central frequency can be tuned over a wide range (from about 20 Hz to 4 kHz). The output of the filter is a variable amplitude sinusoidal wave. This wave has the same frequency as the rotor slot ripple . Two options are to detect the frequency of the SCF output signal: a Phase Locked Loop or a frequency to voltage converter (FVC).
5.step three.dos. Profession Programmable Door Arrays (FPGA)
A remarkable application of DSPs otherwise FPGAs ‘s the sensorless manage having fast programs in line with the execution out-of PWM handle strategies, which happen to be categorized since unipolar and you can bipolar measures [twenty-four,51]. According to PWM approach utilized the control system may cause an excellent commutation decrease from inside the high-speed software due to the fact PWM altering in addition to inverter commutation can’t be over independently. If for example the commutation immediate is actually synchronized on the end of your own PWM modifying period ideal commutation takes place having any decrease. However, because commutating instant relies on the newest rotor reputation they cannot fundamentally coincide into end out of PWM months and you may undesired commutation decrease was brought. This matter are defeat from the managing the current and you will regularity by themselves of the DC hook current control design. So it manage are going to be implemented having fun with good DSP otherwise FPGA established high speed sensorless control setup .
Regular fast applications where PWM process applies is digital films computer (DVD) spindle expertise, in fact it is followed having fun with an excellent FPGA, for instance the Altera Bend EPF6024AQC240-3 . The new operator has a couple main pieces: the brand new PWM age bracket circuit and the power tool manage circuit. Profile 23 suggests the system, having its a beneficial FPGA, a beneficial BLDC motor, therefore the relevant site and sensing circuits . Simply terminal voltages of three stages are sampled and you may fed into new FPGA control to assess the fresh commutation instants. This program leads to extreme reduced total of conduction losses and you may electricity consumption, which is somewhat essential for small power BLDCM drives running on power and you can/or that have minimal dissipation place.
5.step three.step 3. Microprocessors (MP)
A reduced-cost sensorless manage system for BLDC cars might be observed when the rotor status info is derived from the selection only 1 motor-terminal-current, which leads to significant reduction in components number of your own feeling circuit. As shown into the Figure 9 , just a couple of around three condition-windings are thrilled at match a time, together with 3rd phase was discover when you look at the changeover symptoms between the good and bad flat segments of the right back-EMF . Therefore, each of the system terminal voltages contains the straight back-EMF recommendations that can be used so you’re able to obtain the fresh commutation instants.
Cost saving is further increased by coupling the position sensing circuit with a single-chip microprocessor or DSP for speed control. Figure 24 shows a block diagram of the position detection circuit based on sensing all three motor terminal voltages for a BLDC motor. Each of the motor terminal voltages, referred to as the negative DC bus rail VA‘, VB‘ and VC‘ are fed into a filter through a voltage divider of a resistor network. This removes the DC component and high frequency contents that result from the PWM operation. The phase information is extracted from the back-EMF. The correction is based on measuring the elapsed time between the last two zero-crossing instants and converting it to frequency. This operation is achieved when the filtered voltage, VA”, is passed to a comparator to detect these zero-crossing instants, which are further sent to a microprocessor for phase-delay correction and generation of commutation signals. The microprocessor produces gate control signals for the inverter and may perform closed speed control with the motor speed information measured by the frequency of the detected signals .